Silicon Labs /SiM3_NRND /SIM3L168_A /CLKCTRL_0 /PM3CN

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Interpret as PM3CN

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (LPOSC0_DIV)PM3CSEL 0 (DISABLED)PM3CEN

PM3CEN=DISABLED, PM3CSEL=LPOSC0_DIV

Description

Power Mode 3 Clock Control

Fields

PM3CSEL

Power Mode 3 Fast-Wake Clock Source.

0 (LPOSC0_DIV): Power Mode 3 clock source is the Low-Power Oscillator.

1 (LFOSC0): Power Mode 3 clock source is the Low-Frequency Oscillator.

2 (RTC0TCLK): Power Mode 3 clock source is the RTC0TCLK signal.

3 (EXTOSC0): Power Mode 3 clock source is the External Oscillator.

4 (VIORFCLK): Power Mode 3 clock source is the VIORFCLK input pin.

5 (PLL0OSC): Power Mode 3 clock source is the PLL.

6 (LPOSC0): Power Mode 3 clock source is a divided version of the Low-Power Oscillator.

PM3CEN

Power Mode 3 Fast-Wake Clock Enable.

0 (DISABLED): Disable the core clock when in Power Mode 3.

1 (ENABLED): The core clock is enabled and runs off the clock selected by PM3CSEL in Power Mode 3.

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